P89C662HBA

8-bit, Flash microcontroller, 80C51 CPU, 12 clocks, Fully static operation, Four 8-bit I/O ports, 1.5 W

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Price:: US $1.00~10.00 / piece [Get Latest Price]

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PartNumber:: P89C662HBA

Brand:: NXP Semiconductors - nxp | Pack: PLCC | D/C: 09+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2011-08-08

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Part Number:P89C662HBA
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Product Summary

The P89C662HBA contains a non-volatile 16KB/32KB/64KB Flash program memory that is both parallel programmable and serial In-System and In-Application Programmable. In-System Programming (ISP) allows the user to download new code while the P89C662HBA sits in the application. In-Application Programming (IAP) means that the microcontroller fetches new program code and reprograms itself while in the system. This allows for remote programming over a modem link. A default serial loader (boot loader) program in ROM allows serial In-System Programming of the Flash memory via the UART without the need for a loader in the Flash code. For In-Application Programming, the user program erases and reprograms the Flash memory by use of standard routines contained in ROM.

Parametrics

P89C662HBA absolute maximum ratings: (1)Operating temperature under bias: 0 to +70 or –40 to +85 ℃; (2)Storage temperature range: –65 to +150 ℃; (3)Voltage on EA/VPP pin to VSS: 0 to +13.0 V; (4)Voltage on any other pin to VSS: –0.5 to +6.5 V; (5)Maximum IOL per I/O pin: 15 mA; (6)Power dissipation (based on package heat transfer limitations, not device power consumption) 1.5 W.

Features

P89C662HBA features: (1)80C51 Central Processing Unit; (2)On-chip Flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capability; (3)Boot ROM contains low level Flash programming routines for; (4)downloading via the UART; (5)Can be programmed by the end-user application (IAP); (6)Parallel programming with 87C51 compatible hardware interface to programmer; (7)Six clocks per machine cycle operation (standard); (8)12 clocks per machine cycle operation (optional); (9)Speed up to 20 MHz with 6 clock cycles per machine cycle; (10)(40 MHz equivalent performance); up to 33 MHz with 12 clocks; (11)per machine cycle; (12)Fully static operation; (13)RAM externally expandable to 64 kbytes; (14)Four interrupt priority levels; (15)Eight interrupt sources; (16)Four 8-bit I/O ports; (17)Programmable clock out; (18)Second DPTR register; (19)Asynchronous port reset; (20)Low EMI (inhibit ALE).