Product Summary

The IS41C16100S-50K is a 16-bit high-performance CMOS Dynamic Random Access Memorie. It offers an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the IS41C16100S-50K ideal for use in 16-, 32-bit wide data bus systems. These features make the device ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications. The IS41C16100S-50K is packaged in a 42-pin 400mil SOJ and 400mil 50-(44-) pin TSOP-2.

Parametrics

IS41C16100S-50K absolute maximum ratings: (1)Voltage on Any Pin Relative to GND: 5V:–1.0V to +7.0V, 3.3V:-0.5V to +4.6V; (2)Supply Voltage:5V:–1.0V to +7.0V, 3.3V:–0.5V to +4.6V; (3)Output Current:50mA; (4)Power Dissipation:1W; (5)Commercial Operation Temperature:0℃ to +70℃; (6)Industrial Operationg Temperature:–40℃ to +85℃; (7)Storage Temperature:–55℃ to +125℃.

Features

IS41C16100S-50K features: (1)Extended Data-Out (EDO) Page Mode access cycle; (2)TTL compatible inputs and outputs; tristate I/O; (3)Refresh Interval:Refresh Mode: 1,024 cycles /16 ms, RAS-Only, CAS-before-RAS (CBR), and Hidden Self refresh Mode - 1,024 cycles / 128ms; (4)JEDEC standard pinout; (5)Single power supply: 5V ±10%; (6)Byte Write and Byte Read operation via two CAS; (7)Industrail Temperature Range -40℃ to 85℃.

Diagrams

IS41C16100S-50K block diagram

IS41C16100
IS41C16100

Other


Data Sheet

Negotiable 
IS41C16100S
IS41C16100S

Other


Data Sheet

Negotiable 
IS41C16105
IS41C16105

Other


Data Sheet

Negotiable 
IS41C16128
IS41C16128

Other


Data Sheet

Negotiable 
IS41C16256
IS41C16256

Other


Data Sheet

Negotiable 
IS41C16256C-35TLI
IS41C16256C-35TLI

ISSI

DRAM 4M, 5V, EDO DRAM 35ns, 40 pin TSOP II

Data Sheet

0-270: $2.47
270-540: $2.32
540-1080: $2.22
1080-2565: $2.15