Product Summary
The EP1S80F1020C7 contain a two-dimensional row- and column-based architecture to implement custom logic. A series of column and row interconnects of varying length and speed provide signal interconnects between logic array blocks (LABs), memory block structures, and DSP blocks.
Parametrics
EP1S80F1020C7 absolute maximum ratings: (1)Supply voltage, With respect to ground, VCCINT: –0.5 to 2.4V; (2)Supply voltage, VCCIO: –0.5 to 4.6V; (3)DC input voltage, VI: –0.5 to 4.6V; (4)DC output current, per pin, IOUT: –25 to 40mA; (5)Storage temperature No bias, TSTG: –65 to 150℃; (6)Junction temperature BGA packages under bias, TJ: 135℃.
Features
EP1S80F1020C7 features: (1)10,570 to 79,040 LEs; (2)Up to 7,427,520 RAM bits (928,440 bytes) available without reducing logic resources; (3)TriMatrixTM memory consisting of three RAM block sizes to implement true dual-port memory and first-in first-out (FIFO) buffers; (4)High-speed DSP blocks provide dedicated implementation of multipliers (faster than 300 MHz), multiply-accumulate functions, and finite impulse response (FIR) filters; (5)Up to 16 global clocks with 22 clocking resources per device region.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
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EP1S80F1020C7 |
IC STRATIX FPGA 80K LE 1020-FBGA |
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EP1S80F1020C7N |
IC STRATIX FPGA 80K LE 1020-FBGA |
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